1. Field of the Invention
The present invention relates to a memory device, and more particularly, to a sense amplifier for a memory device.
2. Background of the Related Art
FIG. 1 is a block diagram showing a sense amplifier of a virtual ground flat cell according to the related art. As shown in FIG. 1, the sense amplifier of a virtual ground flat cell includes a first current/voltage converter 11A connected to a bit line (BL) of a virtual ground flat cell for converting a current of a cell into a voltage. A second current/voltage converter 11B converts a reference current Iref into a reference voltage. A voltage comparator 12 compares outputs from the first and second current/voltage converters 11A, 11B to output a voltage corresponding to a read data.
FIG. 2 is a circuit diagram showing a virtual ground flat cell array according to the related art. When an arbitrary low cell (i.e., a cell having a low value stored therein) in the virtual ground flat cell array in FIG. 2 is read, a large current flows along the bit line (BL) to apply a high level current to the gate of an NMOS transistor (NM1) from an inverter (I1). As a result, the NMOS transistor (NM1) is turned on and a voltage from an output node (Na) of the first current/voltage converter 11A becomes lower than the reference voltage applied to an output node (Nb) from the second current/voltage converter 11B. Accordingly, the voltage comparator 12 compares the voltages from the output nodes (Na, Nb) to output a low level of a ground voltage (Vss), which becomes an output (DATA OUT) from the sense amplifier.
When an arbitrary high cell (i.e., a cell having a high value stored therein) in the virtual ground flat cell array is read, a small current flows along the bit line (BL). As a result, the voltage from the output node (Na) of the first current/voltage converter 11A becomes higher than the reference voltage applied to the output node (Nb). Accordingly, the voltage comparator 12 compares the voltages from the output nodes (Na, Nb) to generate a high level source voltage (Vcc), which becomes the output (DATA OUT) from the sense amplifier. The voltage comparator 12 includes a differential amplifier type voltage comparator and an inverter type voltage comparator.
As an example, a read path will now be described. The read path as shown in FIG. 2 is initially described where a high cell of an NMOS transistor (NM35) is read and then where a low cell of an NMOS transistor (NM34) is read.
When the high cell of the NMOS transistor (NM35) is read, a bank select signal (SEL1), a word line signal (WL0) and a left-right select signal (/SEL2) are applied as a high level while the other signals are applied as a low level. Accordingly, the bit line (BL) is connected to the ground terminal (Vss), sequentially through a metal contact (MC3) and NMOS transistors (NM13, NM35, NM52, NM12).
When the low cell of the NMOS transistor (NM34) is read, the bank select signal (SEL1), the word line signal (WL0) and a bank select signal (SEL2) are applied as a high level while the other signals are applied as a low level. Accordingly, the bit line (BL) is connected to the ground terminal (Vss), sequentially through a metal contact (MC3) and NMOS transistors (NM13, NM22, NM34, NM12).
However, when NMOS transistors (NM36, NM37), which are adjacent to the NMOS transistor (NM35) are low cells, and the high cell of the NMOS transistor (NM35) is read, a leakage current flows toward the ground sides not selected. That is, the leakage current flows toward the side of the NMOS transistors (NM36, NM37). When the leakage current exceeds the reference current, a large current flows along the bit line (BL) similar to the case when the low cell is read. As a result, the voltage from the output node (Na) becomes lower than the reference voltage from the output node (Nb). Therefore, the voltage comparator 12 improperly generates a low level ground voltage (Vss) as when the low cell (NM34) is read.
As described above the related art sense amplifier has various disadvantages. When a low cell is positioned adjacent a high cell when the high cell is read in the related art sense amplifier for a virtual ground flat cell, a leakage current flows in accordance with the low cell. Further, when the leakage current exceeds the reference value, the sense amplifier performs an erroneous operation.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.